STM32 H563 I2C TIMINGR Add
Description
Description
The STM32H5 series (e.g., STM32H563/H573) features high-performance I2C peripherals (I2C V2 IP), which utilize the 32-bit I2C_TIMINGR register for baud rate and timing configuration (Standard-mode, Fast-mode, and Fast-mode Plus).
Currently, in ports/stm32/, the preprocessor logic for I2C_V2 and TIMINGR calculation includes families like STM32H7, STM32G0/G4, and STM32WB, but STM32H5 is notably absent. This prevents the driver from correctly initializing the I2C block on H5 hardware.
Verification & Results
I have implemented a patch to include STM32H5 in the I2C V2 logic. Local testing on a H563RI Board demonstrates that the timing calculation is accurate. I have successfully verified stable I2C communication at standard bus speeds, as well as custom configurations up to 1.5 MHz (overclocked Fast-mode Plus), which confirms the flexibility and correctness of the timing logic.
<img width="586" height="292" alt="Image" src="https://github.com/user-attachments/assets/e14a14fe-a3df-4fdb-9b7a-838631271579" />
Code Size
No response
Implementation
I hope the MicroPython maintainers or community will implement this feature
Code of Conduct
Yes, I agree
H7 I2C4 missing
@iabdalkader
When I added the I2C4 port definition to mpconfigport.h I came across some missing things:
- HAL is missing some labels pertaining the I2C4 bus
- the I2C.c is missing creation in when making a new object
- the I2C.h is missing the I2C4 mention.
Added to mpconfigport.h of boards/NUCLEO_H743ZI:
#define MICROPY_HW_I2C4_SCL (pin_F14)
#define MICROPY_HW_I2C4_SDA (pin_F15)
Added to stm32/i2c.h
extern I2C_HandleTypeDef I2CHandle4;
Added to stm32/i2c.c at make_new
#ifdef MICROPY_HW_I2C4_NAME
} else if (strcmp(port, MICROPY_HW_I2C4_NAME) == 0) {
i2c_id = 4;
#endif
And had to add to STM32H7xx_HAL_Driver/inc/Legacy/stm32_hal_legacy.h
#define __I2C4_CLK_ENABLE __HAL_RCC_I2C4_CLK_ENABLE
#define __I2C4_CLK_SLEEP_DISABLE __HAL_RCC_I2C4_CLK_SLEEP_DISABLE
#define __I2C4_CLK_SLEEP_ENABLE __HAL_RCC_I2C4_CLK_SLEEP_ENABLE
#define __I2C4_FORCE_RESET __HAL_RCC_I2C4_FORCE_RESET
#define __I2C4_RELEASE_RESET __HAL_RCC_I2C4_RELEASE_RESET
For it to compile without errors...