← index #17747Issue #17111
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QUERY · ISSUE

rp2: Support for new RP2350 PIO instructions in the `@rp2.asm_pio` assembler

openby rtyleyopened 2025-07-22updated 2025-12-30
enhancementport-rp2

Description

The RP2350 adds several new PIO instructions/options compared to the RP2040 - currently they're not supported by MicroPython's @rp2.asm_pio assembler, so it's difficult to use them under MicroPython.

https://datasheets.raspberrypi.com/rp2350/rp2350-datasheet.pdf

The PIO changes are listed in Section 11.1.1. ('Changes from RP2040') - note that the first change is:

DBG_CFGINFO.VERSION indicates the PIO version, to allow PIO feature detection at runtime.
This 4-bit field was reserved-0 on RP2040 (indicating version 0), and reads as 1 on RP2350.

Specifically I'm interested in the new variants of mov that allow random-access to the FIFO queue with indexed arguments:

  • mov rxfifo[y], isr
  • mov rxfifo[<index>], isr
  • mov osr, rxfifo[y]
  • mov osr, rxfifo[<index>]

where:

  • y : The literal token "y", indicating the RX FIFO entry is indexed by the Y register.
  • <index> : A value (see Section 11.3.2) specifying the RX FIFO entry to write (valid range 0-3).

It's not currently possible to express these with the Micropython mov() assembler function, so far as I'm aware.

Support for the rp2040 was originally added to MicroPython with:

  • https://github.com/micropython/micropython/pull/6791

See also:

  • https://github.com/raspberrypi/pico-feedback/issues/437

Code Size

Random-access to the FIFO queue is a pretty substantial upgrade for PIO! I really do not know how large/difficult the implementation would be though.

Implementation

I hope the MicroPython maintainers or community will implement this feature

Code of Conduct

Yes, I agree

CANDIDATE · ISSUE

HSTX Support for RP2350

openby sfe-SparkFroopened 2025-04-10updated 2025-10-29
enhancementport-rp2

Description

Would love for the RP2350's HSTX peripheral to be available in MicroPython! It provides an interface for outputting data ludicrously fast (8 GPIO pins (GPIO 12-19 only), DDR on each clock cycle, so up to 2.4Gbps without any overclocking), very useful for things like displays. Would be a part of the rp2 module, only on RP2350 boards (not supported on RP2040).

Section 12.11 of the RP2350 datasheet provides more details about the hardware. There are also a couple examples from the pico-examples repo.

As I understand it, basically just need to gpio_set_function(<GPIO 12-19>, GPIO_FUNC_HSTX), configure the hardware peripheral hstx_ctrl_hw (from hardware/structs/hstx_ctrl.h using macros from hardware/regs/hstx_ctrl.h), then send data to the FIFO buffer hstx_fifo_hw (from hardware/structs/hstx_fifo.h using macros from hardware/regs/hstx_fifo.h). I believe it's also possible to have the DMA feed the HSTX FIFO, DREQ_HSTX is a member of the DMA's dreq_num_rp2350, which should be made available in MicroPython.

Code Size

IMO this should always be enabled for RP2350 boards as part of the rp2 module, similar to the PIO and DMA features. Not expecting it to be very large.

Implementation

I hope the MicroPython maintainers or community will implement this feature

Code of Conduct

Yes, I agree

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