Port, board and/or hardware

Raspberry Pi Pico

MicroPython version

MicroPython v1.23.0 ,RPI_PICO-20240602-v1.23.0

Reproduction

def configure_adc_sample_rate(self, sample_rate):
    """
    Configure the ADC sampling rate. Due to unknown reasons, the DIV register cannot be configured here. The actual sampling period is fixed at 65
    :param sample_rate: Desired sample rate (Hz)
    :return: None
    """
    # Ensure that the sampling rate is within a reasonable range
    if sample_rate <= 0 or sample_rate > 48_000_000:
        raise ValueError("sample rate out of range")

    # Calculate divider value
    total_period = 48_000_000 / sample_rate
    int_part = int(total_period) - 1
    frac_part = int((total_period - int_part - 1) * 256)
    div_value = mem32[DMA_ADC_Transfer.DIV_REG]

    
    # Write the sampling period to the DIV register
    mem32[DMA_ADC_Transfer.DIV_REG] = div_value | (int_part << 8) | frac_part

Expected behaviour

I am configuring the ADC sampling rate here. Due to unknown reasons, the DIV register cannot be configured here. The actual sampling period is fixed at 65.
Can anyone help me what is going wrong here？

Observed behaviour

(base) PS D:\lee\windows terminal\terminal-1.17.11461.0> mpremote connect COM8
Connected to MicroPython at COM8
Use Ctrl-] or Ctrl-x to exit this shell

div_value = mem32[DMA_ADC_Transfer.DIV_REG]
Traceback (most recent call last):
File "<stdin>", line 1, in <module>
NameError: name 'mem32' isn't defined
from machine import mem32
div_value = mem32[DMA_ADC_Transfer.DIV_REG]
div_value
12582656
total_period = 48_000_000 / 48000
total_period = 48_000_000 / 480000
total_period
100.0
int_part = int(total_period) - 1
frac_part = int((total_period - int_part - 1) * 256)
mem32[DMA_ADC_Transfer.DIV_REG] = div_value | (int_part << 8) | frac_part
mem32[DMA_ADC_Transfer.DIV_REG]
12582656
total_period = 48_000_000 / 480000
int_part = int(total_period) - 1
frac_part = int((total_period - int_part - 1) * 256)
mem32[DMA_ADC_Transfer.DIV_REG] = div_value | (int_part << 8) | frac_part
mem32[DMA_ADC_Transfer.DIV_REG]
12582656

Additional Information

<img width="554" alt="a91a38f1944c012e122d14c44dcbc40" src="https://github.com/user-attachments/assets/bf2fc3ad-9186-4a46-82b2-0262dbcb828a">

Code of Conduct

Yes, I agree